000 00724nam0a22002413i 4500
001 6550
005 20170629130440.0
010 _a978-0-470-22941-5
090 _a6550
100 _a20091214d2008 m u0pory50
200 1 _aCMOS
_ecircuit design, layout, and simulation
_fR. Jacob Baker
205 _a2nd ed
210 _aHoboken
_cJohn Wiley & Sons
_d2008
215 _aXXXI, 1038 p. : il.
_d24 cm
225 1 _aIEEE Press Series on Microelectronic Systems
606 _910305
_aElectrónica
606 _912646
_aCMOS
606 _912645
_aDesign de circuitos
606 _913602
_aConstrução de circuitos
675 _a621.38
700 1 _aBAKER
_bR. Jacob
_95970
852 _aISEL
_bBiblioteca Central
_gBAK.
_j621.38
942 _cMO