000 00606nam a2200193 i 4500
001 24573
005 20191129131612.0
010 _a978-0-387-29906-8
100 _a20090708d2006 0pory50 ba
200 1 _aScalable hardware verification with symbolic simulation
_bDocumento electrónico
_fValeria Bertacco
210 _aNew York
_cSpringer
_d2006
215 _aE-book
300 _aAcesso ao documento electrónico no ISEL
606 _910390
_aEngenharia
675 _a62
700 1 _aBERTACCO
_bValeria
_912599
856 _uhttp://www.springerlink.com/content/g227t7/
_zAcesso online
090 _a24573
942 _cEBO