000 | 00961nam0a22002653i 4500 | ||
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001 | 10843 | ||
005 | 20200901115942.0 | ||
010 | _a0-7923-9744-4 | ||
100 | _a19991116d1996 m u0pory50 | ||
200 | 1 |
_aQuick-turnaround asic design in VHDL _ecore-based behavioral synthesis _fMohamed S. Ben Romdhane, Vijay K. Madisetti, John W. Hines _gforew. Jonathan Allen |
|
210 |
_aBoston _cKluwer Academic Publishers _d1996 |
||
215 |
_aXVIII, 180 p. _cil. |
||
225 | 1 | _aThe Kluwer International Series in Engineering and Computer Science | |
606 |
_913292 _aHardware |
||
606 |
_928798 _aLinguagens de descrição de hardware |
||
606 |
_919114 _aVHDL |
||
606 |
_928915 _aProjecto ASIC de retorno rápido |
||
675 | _a004.3VHDL | ||
700 | 1 |
_aROMDHANE _bMohamed S. Ben _93237 |
|
701 | 1 |
_95909 _aMADISETTI _bVijay K. |
|
701 |
_928914 _aHINES _bJohn W. |
||
702 |
_931593 _aALLEN _bJonathan |
||
852 |
_aISEL _bBiblioteca _gROM. _j004.3VHDL |
||
090 | _a10843 | ||
942 | _cMO |